cystech electronics corp. spec. no. : c889e3 issued date : 2013.02.20 revised date : 2013.02.26 page no. : 1/7 MTB04N03E3 cystek product specification n-channel enhancement mode power mosfet MTB04N03E3 bv dss 30v i d 115a v gs =10v, i d =30a 3.8m r dson(typ) v gs =4.5v, i d =24a 6.1m features ? simple drive requirement ? repetitive avalanche rated ? fast switching characteristic ? pb-free lead plating and rohs compliant package symbol outline MTB04N03E3 g gate d drain s source to-220 g d s absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 20 v continuous drain current @v gs =10v, t c =25 c i d 115 continuous drain current @v gs =10v, t c =100 c i d 81 pulsed drain current i dm 460 *1 avalanche current i as 26 a avalanche energy l=2mh, i d =26a, v dd =25v e as 576 repetitive avalanche energy l=0.05mh e ar 25 mj t c =25 c 107 total power dissipation t c =100 c p d 53 w operating junction and storage temperature tj, tstg -55~+175 c note : *1 . pulse width limited by maximum junction temperature.
cystech electronics corp. spec. no. : c889e3 issued date : 2013.02.20 revised date : 2013.02.26 page no. : 2/7 MTB04N03E3 cystek product specification thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 1.4 c/w thermal resistance, junction-to-ambient, max r th,j-a 62.5 c/w characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v gs =0v, i d =250 a v gs(th) 1 2.2 3 v v ds = v gs , i d =250 a i gss - - d 100 na v gs = d 20, v ds =0v - - 1 v ds =30v, v gs =0v i dss - - 25 a v ds =30v, v gs =0v, tj=125 c - 3.8 5 v gs =10v, i d =30a *r ds(on) - 6.1 8 m v gs =4.5v, i d =24a *g fs - 39 - s v ds =5v, i d =20a dynamic *qg(v gs =10v) - 50 - *qg(v gs =5v) - 31 - *qgs - 10 - *qgd - 18 - nc v ds =15v, i d =30a,v gs =10v *t d(on) - 12 - *tr - 10 - *t d(off) - 43 - *t f - 13 - ns v ds =15v, i d =25a, v gs =10v, r gs =2.7 ciss - 2466 - coss - 432 - crss - 298 - pf v gs =0v, v ds =25v, f=1mhz source-drain diode *i s - - 115 *i sm - - 460 a *v sd - 0.96 1.2 v i f =75a, v gs =0v *trr - 35 - ns *qrr - 28 - nc i f =30a, v gs =0v, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping MTB04N03E3-0-ub-s to-220 (pb-free lead plating and rohs compliant package) 50 pcs/tube, 20 tubes/box, 4 boxes / carton
cystech electronics corp. spec. no. : c889e3 issued date : 2013.02.20 revised date : 2013.02.26 page no. : 3/7 MTB04N03E3 cystek product specification typical characteristics typical output characteristics 0 40 80 120 160 200 012345 v ds , drain-source voltage(v) i d , drain current(a) 10v,9v,8v,7v,6v,5v v gs =3v v gs =4v brekdown voltage vs junction temperature 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 180 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 1000 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =3v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 60 70 80 90 100 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =30a r ds( on) @tj=25c : 3.8m v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =30a
cystech electronics corp. spec. no. : c889e3 issued date : 2013.02.20 revised date : 2013.02.26 page no. : 4/7 MTB04N03E3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 180 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 102030405060 total gate charge---qg(nc) v gs , gate-source voltage(v) v ds =15v i d =30a maximum safe operating area 0.1 1 10 100 1000 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms 100 s 10 s r ds( on) limit t c =25c, tj=175c, v gs =10v,r jc =1.4c/w, single pulse maximum drain current vs case temperature 0 20 40 60 80 100 120 140 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =1.4c/w
cystech electronics corp. spec. no. : c889e3 issued date : 2013.02.20 revised date : 2013.02.26 page no. : 5/7 MTB04N03E3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 20 40 60 80 100 120 012345 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v single pulse maximum power dissipation 0 100 200 300 400 500 600 700 800 900 1000 0.0001 0.001 0.01 0.1 1 10 pulse width(s) peak transient power (w) t j(max) =175c t c =25c ja =1.4c/w transient thermal response curves 0.01 0.1 1 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =1.4 c/w
cystech electronics corp. spec. no. : c889e3 issued date : 2013.02.20 revised date : 2013.02.26 page no. : 6/7 MTB04N03E3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 5 +1/-1 seconds 260 +0/-5 c recommended temperature profile for ir reflow pb-free assembly profile feature sn-pb eutectic assembly average ramp-up rate 3 c/second max. 3 c/second max. (tsmax to tp) preheat 100 c 150 c ? temperature min(t s min) ? temperature max(t s max) 150 c 200 c ? time(ts min to ts max ) 60-120 seconds 60-180 seconds time maintained above: ? temperature (t l ) 183 c 217 c ? time (t l ) 60-150 seconds 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. 6 minutes max. 8 minutes max. time 25 c to peak temperature note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c889e3 issued date : 2013.02.20 revised date : 2013.02.26 page no. : 7/7 MTB04N03E3 cystek product specification to-220 dimension marking: b04 n03 1 2 3 device name date code style: pin 1.gate 2.drain 3.source 4.drain 3-lead to-220 plastic package cystek package code: e3 *: typical millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 4.470 4.670 0.176 0.184 e1 12.060 0.475 0.491 12.460 a1 2.520 2.820 0.099 0.111 e 2.540* 0.100* b 0.710 0.910 0.028 0.036 e1 4.980 5.180 0.196 0.204 b1 1.170 1.370 0.046 0.054 f 2.590 0.102 2.890 0.114 c 0.310 0.530 0.012 0.021 h 0.000 0.300 0.000 0.012 c1 1.170 1.370 0.046 0.054 l 13. 400 13.800 0.528 0.543 d 10.010 0.394 l1 3.560 3.960 0.140 0.156 10.310 0.406 e 8.500 0.335 3.735 3.935 0.147 0.155 8.900 0.350 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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